I am designing an Arinc429 receiver based on a micro-controller with two interrupt inputs served by a circuit converting the +/-10V standard signals into two separated 0-3.3V streams, respectively firing at every logic "1" and "0".

The interrupt service routines then encode (fill) an array with 1 or 0 accordingly to the Arinc429 input data. The system is logically correct and works nicely with an emulated stream but only because it comes when the array index is reset to zero. In principle in the real world case it could instead start accumulating data anywhere in between the 32 bit word. Then it would never synchronize again with the data transmission.

How can I know that an incoming bit is a new 32-bits data word start, or, in other words, how could I detect a new data frame start?

  • $\begingroup$ I feel this should be transferred to Stack Overflow or Drones and Model Aircraft $\endgroup$ Commented Apr 17 at 6:13
  • $\begingroup$ @AadirajAnil I believe ARINC 429 related questions are best asked and answered here $\endgroup$ Commented Apr 19 at 18:20
  • 4
    $\begingroup$ I believe this question should be declared as on-topic. It is about the ARINC 429 protocol which is exclusively used in aircraft. Whilst going deep into engineering details, to a level that could also fit at electrical engineering stackexchange, the Aviation-industry-specific nature of ARINC 429 makes it likely that people with the required specific knowledge are in this community. Additionally, by welcoming people from the engineering domain, we all learn about the technology that makes us fly. I will not vote-to-reopen because as a mod my single vote is decisive, it's up to the community. $\endgroup$
    – DeltaLima
    Commented May 21 at 19:46

1 Answer 1


ARCINC 429 uses a tristate voltage level, high at 10 V, low at -10 V and a null at 0 volts. There will be 4 bit lengths of null voltage between 32 bit messages. in the message, a high will be 10 V followed by a return to null. a low will be -10 V followed by a return to null. The time of the bit lengths depends on the transmission rate, usually 12.5 K bits per second or 100 K bits per second.

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    $\begingroup$ I was missing the 4-bit lengths of null voltage between consecutive messages. This allows to properly detect the next message start with proper firmware modifications. Jim's comment helped a lot, thanks. $\endgroup$ Commented Apr 17 at 6:18

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