I am designing an Arinc429 receiver based on a micro-controller with two interrupt inputs served by a circuit converting the +/-10V standard signals into two separated 0-3.3V streams, respectively firing at every logic "1" and "0".
The interrupt service routines then encode (fill) an array with 1 or 0 accordingly to the Arinc429 input data. The system is logically correct and works nicely with an emulated stream but only because it comes when the array index is reset to zero. In principle in the real world case it could instead start accumulating data anywhere in between the 32 bit word. Then it would never synchronize again with the data transmission.
How can I know that an incoming bit is a new 32-bits data word start, or, in other words, how could I detect a new data frame start?