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I've read that the "F-16", without it being specified what version, uses the 1750A CPU, it is on the list here, although without a citation: https://en.wikipedia.org/wiki/MIL-STD-1750A

However, surely this can't be right for more modern F-16's?

I'm curious what CPU the F-16A, C, E, and IN uses.

Perhaps even the more modern F-16's still retain the 1750A for some "legacy" features, but have a more modern "front end" CPU to handle the more modern features?

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    $\begingroup$ Not clear what you are asking here. A system of that size could easily have more than one CPU per subsystem. You can safely assume fly-by-wire has 2-3 CPUs different from the auto pilot. 1750A you mentioned was used by flight control and fire control, while the answer below listed MIPS family for mission control. They may co-exist on one aircraft easily. $\endgroup$ – user3528438 Jun 22 '18 at 2:46
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    $\begingroup$ The F-16 was designed in the 1970s, so expect 1970s technology in the oldest of them. Of course many of them will have been upgraded over the 4 decades since they entered service. $\endgroup$ – jwenting Jun 22 '18 at 4:48
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    $\begingroup$ airplanes' computer's architecture may be different from your desktop computer. It may be based on specialized chipsets (real time constraints, specialized computation,...) I'm not quite sure you ca n compare it by only focusing on CPUs. $\endgroup$ – Manu H Jun 22 '18 at 7:24
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    $\begingroup$ @jwenting: The F-16 received a mid-life update (from Block 50 on, IIRC) because the additional load of terrain avoidance made new processors necessary. First flight was even before the 1750A standard was finished, so a range of processors were/are used. $\endgroup$ – Peter Kämpf Jun 22 '18 at 12:28
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    $\begingroup$ I think this gets into the common misconception that there is only on CPU for all of the systems in the aircraft. Perhaps if you were looking for the microcontroller used in a specific system, as @aerobot has in their answer, you might get better results. $\endgroup$ – selectstriker2 Jun 22 '18 at 17:25
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MIL-STD-1760A is simply the standard that a processor must conform to, and is not an actual model of CPU.

There are actually a lot of independent computers in a military aircraft, each with specific responsibilities. They are usually linked up via networks, typically over MIL-STD-1553 busses for older platforms. The radar has its own processor(s) and architecture(s), as does the flight control module, the fire control module, the navigation system, the munition controllers (sometimes one per weapon station/pylon), the display controller, the mission computer, et cetera. All of these come from different OEMs, and therefore use a variety of hardware. The different subsystems present and their exact functionalities depend on the design and requirements. A subsystem may itself be composed of multiple computers within their own network, independent of the main aircraft networks.

The F-16 uses Raytheon's Modular Mission Computer (MMC) for its mission computer, with the following specs:

The first generation, the MMC3000 relied on MIPS R3500, a 32-bit chip processors with 110,000 transistors and running at 12 MHz. We found this chip on the end of the 1990s HP9000 computers. The computer had 4 MB of memory RAM.

The MMC5000, the second generation of the F-16 computer, still relied on a chip MIPS, a RM5260 who was noticeably faster (with a 133 MHz to 150 MHz clock frequency) and above all it is a 64-bit chip. The memory was more than doubled, with 10 MB available.

The MMC7000 that equips the more modern F-16, including all F-16 Europeans who benefited from the MLU (mid-life Update) modernisation, has always that 10 MB of memory but its RM7000A processor, designed in the early 2000s, works between 300 and 400 MHz.

Source: http://www.4erevolution.com/en/ordinateur-de-bord-f-16/

I highlighted the mission computer because I think of the mission computer/controller/processor (exact terminology depends on the platform) as the brains of a military aircraft. They tend to be the bus controller of the main aircraft network, aggregating inputs from other subsystems and computing/providing information to the pilot to help them carry out their mission.


To the second part of your question, I assume you mean faster or more powerful CPUs when you talk about modern CPUs. Modern here depends on context. CPUs used In aircraft will never need the type of clock speeds or memory capacity you see in consumer computers, for a few reasons. Firstly, there is actually a lot of processing capacity distributed over the various subsystems - the need for a single powerful chip only arises when you demand that a single chip do everything. Secondly, when the requirements of subsystems are as specific as they as in military platforms, the software can be very compact and efficient, unlike consumer software (which require a lot more code for things like architecture adaptors, multi-tasking logic, and thousands of device drivers) - you trade off unnecessary flexibility in return for reliability and efficiency.

The multi-functional displays of military aircraft (and also commercial ones) focus on conveying the necessary information in a clear and concise manner. The rendering requirements are actually quite primitive compared to modern 3D games - it can get by with less processing power than a computer from the 1990s.


EDIT: Elaborated answer, following user3528438's comment.

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    $\begingroup$ I agree with your later point, but think it is worth bringing out for emphasis: a great deal of money and work by very bright and up-to-the-minute people continues to go into making avionics CPUs and other ICs robust and reliable. New, creative and cutting-edge research continues to be applied in their validation, investigating and preventing failures, etc. In no sense is this a field which has been "left behind" or slow to "get with the program". It's the same with medical devices. It's something people often forget (including parachuted CEOs from other sectors, with disastrous results). $\endgroup$ – user29782 Jun 25 '18 at 16:26
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    $\begingroup$ A quibble. MIL-STD-1750A is 16-bit instruction set architecture. MIL-STD-1760 is aircraft/stores interface. $\endgroup$ – John R. Strohm Jun 28 '18 at 17:23
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F-16 Fire Control Computer Design Details

F-16A/B aircraft Fire Control Computer (FCC) was procured from Delco Electronics, Goleta, California (a General Motors Division). Its proprietary instruction set/architecture processor was designated (by DE) as the M362F-2: "M362" was the general design name, "F" for floating point instruction set, and "-2" for the second version of that instruction set. Other details:

  • 32k core memory in two 16k stacks (supposedly enough memory "for all time"). A note: the "cores" (the individual bit memory elements) were torus-shaped ferrite 13 mils (0.013 inches) in diameter. The center hole was 7 mils diameter. Two wires passed through the core.
  • Clock frequency: 4 MHz (250ns clock period)
  • TTL integrated circuits, mainly 54LSxx parts family although some 54Sxx used in critical propagation paths
  • Microprogrammed processor (16 bit word size) on two circuit cards, P1F and P2F
  • Sixteen 16-bit wide general purpose CPU registers (much like Data General NOVA minicomputers)
  • CPU included several "macro" instructions implementing floating multiply, floating division, polynomial expansion coefficient generation, square root, arctangent in two quadrants to convert fuel flow meter synchro signals to shaft angle
  • I/O was general digital discrete, both 5V ("low level") and 26VDC ("high level")
  • Single dual-redundant Mil-STD-1553 serial data bus
  • Power consumption: 150W from single phase 115VAC 400Hz aircraft power

See f-16.net/forum/viewtopic.php?t=53181 for more M362F-2 details.

P1F from M362 DPS computer Photo of one side of a P1F CCA from a M362F computer. This CCA is identical construction with the P1F CCA used in the FCC.


F-16C/D aircraft were initially equipped with the Enhanced Fire Control Computer (EFCC) also supplied by Delco Electronics. Its processor was designated the M372F-1: "M372" was design name for DE's Mil-STD-1750A compliant processor, "F" for floating point instruction set, and "-1" for that version of the instruction set. DE's internal name for the computer was "D-cubed" and written as "D3". "D" stood for "double" three elements of the M362F-2 design: twice the clock speed as the M362F-2, two dual redundant -1553 bus interfaces, and twice the memory.

  • 64k core memory in two 32k stacks (DE's last core memory product)
  • Clock frequency: 8 MHz (125ns clock period)
  • TTL integrated circuits, mainly 54LSxx parts family although some 54Sxx used in critical propagation paths
  • Microprogrammed processor with pipeline, and hardware-implemented branch prediction contained on four circuit cards: P1F - P4F. Same "macro" instructions as the M362F-2.
  • Two -1553 bus interfaces
  • Same digital discrete and analog interface
  • 300W power consumption (also "double" but not bragged on)

enter image description here Comparing the FCC and EFCC SRU Layout


M362F-2 memory upgrade The FCC's original 32k core memory quickly proved to be too small as more weapons capability was added to the F-16. General Dynamics sought to increase the size of the memory, initially by requiring 128k of core memory to replace the two 16k core stacks. This proved infeasible due to size and power constraints. Instead, DE proposed a solid state memory backed up by lithium batteries. The idea was sold to the (reluctant) Air Force as the only feasible way the memory could be expanded without major redesign of the FCC's chassis, power supply, and assorted other internal memory-related functions. The memory upgrade was implemented with 128k of CMOS static RAM (SRAM). (USAF reluctance was centered on the lithium battery.) The redesign also included a hardware-implemented memory management function to accommodate a memory space larger than the native addressing range of the 16-bit processor. Because the CMOS SRAM was faster than the original core memory the processor throughput increased slightly due to reduced memory access latency time. Power consumption was drastically reduced also. (Core memory is a power hog.) This expanded memory version of the computer was called the XFCC.


Delco Electronics lost the F-16 business as a result of losing the General Avionics Computer (GAC) competition to Teledyne Systems, Van Nuys, California. This proved to be a wakeup call and spurred design activities resulting in the very successful M500 Mil-STD-1750B compliant processors implemented initially in twelve custom CMOS integrated circuits. The M500 series eventually evolved to a single chip (in CMOS) -1750B microcontroller


In an unrelated note, the F-117 used three M362F-2 computers for assorted number crunching tasks. These were the same computers used by the F-16 except they were painted a darker shade of gray and had a "Rose Monet" (pinkish) dot painted on the front for easy recognition. About 1983, a few years following the end of F-117 production, these computers were replaced by a single, more capable number cruncher supplied by IBM Federal Systems Division.

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    $\begingroup$ Interesting, detailed info; is this personal recollection, or is there a source/sources that can be linked? $\endgroup$ – Ralph J Oct 13 '20 at 19:59
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    $\begingroup$ It's a personal recollection, Ralph. I was one of the FCC and EFCC designers at Delco Electronics in Goleta, CA. $\endgroup$ – John Waidner Oct 14 '20 at 0:19
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    $\begingroup$ Very cool - thanks for adding to the discussion! And, welcome to Av.SE. $\endgroup$ – Ralph J Oct 14 '20 at 13:43
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    $\begingroup$ Those are some pretty specific details for "personal recollection". Wish I could manage to recall details like that! Welcome, indeed - now that you're revealed your background, much is expected of you. ;) $\endgroup$ – FreeMan Oct 14 '20 at 16:45
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    $\begingroup$ Thank you, also, for your service! It's deeply appreciated. $\endgroup$ – FreeMan Oct 14 '20 at 23:55
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F-16A/B had two computers (not counting the Firecontrol Radar). It used dual Intel 8080 microprocessors for the Stores Management Set Central Interface Unit and Delco M362F (if memory serves me) (proprietary 16-bit) for the Firecontrol Computer, at least through Block 15B. The 8080s were programmed in assembly language. The FCC was programmed in JOVIAL J3B. The Firecontrol Radar was purchased as a unit and GD had nothing to do with the software in it, as far as I know.

F-16C/D had four computers, again not counting the Firecontrol Radar, and used Zilog Z8002 and MIL-STD-1750A through at least Block 30. All were programmed in Jovial J73.

F-16C/D later switched to Raytheon (actual Texas Instruments DSEG) Modular Mission Computers. I do not know what processor(s) the MMC used. They were originally programmed in Ada. I do not know what they are currently using, but C++ would not surprise me.

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What was historically unique about the F-16 was that it was the first use in a production aircraft of a purely Fly-By-Wire control system without a backup path of mechanical/hydraulic control linkage.

But to ask what CPU that Fly-By-Wire system used would be a mistake: the original version was analog.

Only in the Block 40 series was the analog FBW system replaced by a digital one.

So yes, aircraft have for some time been a complex interaction of multiple electronic systems, and its likely there was digital computation for one purpose or another along for the flight from early on if not the start. But this first production instance of electronics being at the center of the actual flight controls in between the pilot and control surfaces, was an analog system only later replaced by a digital one.

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